
UTAC’s Cutting Edge Semiconductor Packaging Solutions for Automotive Infotainment Systems
Aug 2023

Application Notes – Unit Level Traceability for Automotive Semiconductors
Apr 2023

Cooperation is key to success of the CHIPS and Science Act
Dec 2022

Operating in the eye of the COVID-19 storm Published in Chip Scale Review
Mar 2022

The future is bright for semiconductor industry growth Published in Chip Scale Review
Sept 2021

UTAC, a company well positioned to provide “full turnkey” WLCSP solutions – An interview with UTAC, Yole i-MicroNews

The real third wave of semiconductor market growth and some packaging challenges
UTAC, 2020

More Than a Decade of Excellence in Automotive IC Packaging and Test Manufacturing
UTAC, 2019

A New Development of Thermally Enhanced GaN-QFN with Heat Slug Attach Bonding Technology
Hyung Mook-Michael-Choi, Albert Loh, Ying Jia
EPTC, Dec 2019

Thermal and Mechanical Analysis of Imaging Ball Grid Array Image Sensor Package
Ying Jia, Ko Lwin Kyaw, Teddy Joaquin Carreon
EPTC, Dec 2019

Die Sticking Quality Issue of Tape-and-Reel Packaging for WLCSP
Lynn Khine (ADI), Joel C. Alimagno (UTAC)
EPTC, Dec 2019

20 Most Promising Semiconductor Technology Solution Providers – 2019
CIO Review
13 Sept 2019

Delivering the automotive quality IC packaging technology solution that is helping to define the shape of the automotive industry
Asif Chowdhury, UTAC.
17 July 2019

CMOS Image Sensor Packaging Technology For Automotive Applications
Teoh Eng Kang, Alastair Attard, Jonathan Abela, UTAC. MINAPAD 2019 Grenoble, France,
May 22-23, 2019

OSAT Perspective Automotive Semiconductor Market And Manufacturing Challenges
Asif Chowdhury, UTAC. As Published in Chip Scale Review May June 2019

11 Myths About SiP
Lee Smith, UTAC. Electronic Design. Sept 5, 2018 Visit here to find out more!

Multichip Integrated Copper Clip Package Technlogy, Supports High Current DC-DC Converter Applications.
Michael-HyungMook-Choi, Kyaw Ko Lwin & Lee Smith. UTAC Group 2018.

Copper Clip Package for High Performance MOSFETsand its Optimization
Kyaw Ko Lwin, Carolyn Epino Tubillo, Panumard T., Jun Dimaano, Dr. Nathapong Suthiwongsunthorn, Saravuth Sirinorakul. 18th Electronics Packaging Technology Conference (EPTC), Singapore
1 December 2016

3D SiP Embedded Chip Providing Integration Solutions for Power Applications
Lee J. Smith. 3D-PEIM Conference 2016, Raleigh, North Carolina, USA
14 June 2016

Development Approach and Process Optimization for Sidewall WLCSP Protection
Lee J. Smith and Jun Dimaano. IWLPC 2015, San Jose, USA
13-15 October 2015

Development and Package characterization of Advance Leadless Lead-frame Package
Daniel Ting Lee Teh, Carolyn Epino Tubillo, Kyaw Ko Lwin, Gu Bin, Jun Dimaano, Saravuth Sirinorakul and Dr Nathapong Suthiwongsunthorn, MiNaPAD Forum 2015, Grenoble, France.
22-23 April 2015

Package characterization of UTAC’s Grid Array Package (GQFN) and performance comparison over standard laminate packages
Daniel Ting Lee Teh, Carolyn Epino Tubillo, Kyaw Ko Lwin, Gu Bin, Ang Choon Ghee, Jun Dimaano, Saravuth Sirinorakul and Dr Nathapong Suthiwongsunthorn, 16th Electronics Packaging Technology Conference (EPTC), Singapore
3-5 Dec 2014

Unit Warpage Control with Universal Die Thickness
Gu Bin, Jun Dimaano Jr., Richen Chen, Eric Bool, Seow Fui Shi, Choon Ghee Ang and Dr Nathapong Suthiwongsunthorn, 16th Electronics Packaging Technology Conference (EPTC), Singapore
3-5 Dec 2014

Copper Pillar Bump Structure Optimization for Flip Chip Packaging with Cu/Low-K Stack
X.R. Zhang, W.H. Zhu, B.P. Liew, M. Gaurav, A. Yeo and K.C. Chan Proceedings of EuroSime2010, Bordeaux, France, P. 715-721.
25-28 April 2010

Thermal performance evaluation and methodology for pyramid stack die packages
S. Krishna S., W.H. Zhu, C.K. Wang, S.H. Ore, H.B. tan and Anthony Y.S. Sun, Proceedings of Itherm2008, Florida, US, P.325-32.
28-31 May 2008

Drop Reliability Study of BGA Assemblies with SAC305, SAC105 and SAC105-Ni Solder Ball on Cu-OSP and ENIG Surface Finish
W.H. Zhu, Luhua Xu, John HL Pang, X.R. Zhang, Edith Poh, Y.F. Sun, Anthony Y.S. Sun, C.K. Wang, H.B. Tan, the 58th Electronic Components and Technology Conference (ECTC2008), P.1667-72.
27-30 May 2008

Impact of Packaging Design on Reliability of Large Die Cu/low-? (BD) Interconnect
Chai TC, Xiaowu Zhang, H.Y. Li, VN Sekhar, Hnin WY, Thew ML, OK Navas, John Lau, R. Murthy, S. Balakumar ,Tan YM, Cheng CK, SL Liew, Chi DZ, Zhu W.H., the 58th Electronic Components and Technology Conference (ECTC2008), Florida, US, P.38-45.
27-30 May 2008

Angled high strain rate shear testing for SnAgCu solder ball
T.C. Chai, D.Q. Yu, W.H. Zhu and X.R. Zhang. The 58th Electronic Components and Technology Conference (ECTC2008), Florida, US, P.623-28.
27-30 May 2008

Die Attach Adhesives for 3D Same-Sized Dies Stacked Packages
Toh CH, Mehta Gaurav, Tan Hua Hong and Ong Wilson PL. The 58th Electronic Components and Technology Conference (ECTC2008), Florida, US, P.1538-43.
27-30 May 2008

Warpage Simulation and DOE Analysis with Application in Package-on-Package Development
Wei Sun, W.H. Zhu, C.K. Wang, Anthony Y.S. Sun and H.B. Tan, Proceedings of EuroSime2008, Freiburg, Germany, P.244-51.
20-23 April 2008

Lead-free Solder Material Characterization For Themo-mechanical Modeling
Edith S.W. Poh*, W.H. Zhu, X.R. Zhang, C.K. Wang, Anthony Y.S. Sun and H.B. Tan, Proceedings of EuroSime2008, Freiburg, Germany, P.627-34.
20-23 April, 2008

Simulation Study on the Warpage Behavior and Board-level Temperature Cycling Reliability of PoP Potentially for High-speed Memory Packaging
Wei Sun, W.H. Zhu, Kriangsak Sae Le and H.B. Tan. ICEPT –HDP 2008 (C3-05) (Best conference paper).

Study of Five Substrate Pad Finishes for the Co-design of Solder Joint Reliability under Board-level Drop and Temperature Cycling Test Conditions
Wei Sun, W.H. Zhu, Edith S. W. Poh, H.B. Tan and Richard Te Gan. ICEPT –HDP 2008 (E3-08).

Thermal Evaluation of Two Die Stacked FBGA Packages
Krishnamoorthi. S, W.H. Zhu, C.K.Wang, H.B. Tan and Anthony Y.S. Sun. EPTC2007, Singapore, P. 278-284.
10-12 Dec. 2007

Ag Content Effect on Mechanical Properties of Sn-xAg-0.5Cu Solders
F.X. Che, Edith Candy Poh, W.H. Zhu and B.S. Xiong, EPTC2007, Singapore, P. 713-718.
10-12 Dec. 2007

Reliability assessment for Cu/Low-k structure based on bump shear modeling and simulation method
F.X. Che and W.H. Zhu, EPTC2007, Singapore, P. 27-31.
10-12 Dec. 2007

Packaging Failure Isolation with Time-Domain Reflectometry (TDR) for Advanced BGA Packages
Weiliang Yuan, Wenhui Zhu, Palei Win, CK Wang, HB Tan, and Anthony YS Sun, Proceedings of 8th International Conference on Electronics Packaging Technology (ICEPT 2007), Shanghai, China, pp.597-600..
August 14th – 17th, 2007

Interfacial Reactions of Ni-doped SAC105 and SAC405 Solders on Ni-Au Finish during Multiple Reflows
Toh C.H., Liu Hao1, Tu C.T., Chen T.D., and Jessica Yeo, Proceedings of 8th International Conference on Electronics Packaging Technology (ICEPT 2007), Shanghai, China, pp.410-415.
August 14th – 17th, 2007

Packaging Failure Isolation with Time-Domain Reflectometry (TDR) for Advanced BGA Packages
Weiliang Yuan, Wenhui Zhu, Palei Win, CK Wang, HB Tan, and Anthony YS Sun, Proceedings of 8th International Conference on Electronics Packaging Technology (ICEPT 2007), Shanghai, China, pp.597-600.
August 14th – 17th, 2007

Comprehensive Modeling of Stress-Strain Behavior for Lead-Free Solder Joints under Board-Level Drop Impact Loading Condition
F. X. Che, W. H. Zhu, Wei Sun, Anthony Sun, C.K. Wang and H.B. Tan, ECTC2007, Rero, pp. 528-535.
29 May-1st June, 2007

Thermal Performance Enhancement for CSP Packages
Danny Retuta, Y. Y. Ma, Ravi Kanth, H.B. Tan, Anthony Sun and Susanto Tanary, ECTC2007, Rero, pp. 1690-1695.
29 May-1st June, 2007

Ultra-thin Die Characterization for Stack-die Packaging
Wei Sun, W.H. Zhu, F.X. Che, C.K. Wang, Anthony Y.S. Sun and H.B. Tan, ECTC2007, Rero, pp. 1390 - 1396.
29 May-1st June, 2007

Study on the Board-level SMT Assembly and Solder Joint Reliability of Different QFN Packages
Wei Sun, W.H. Zhu, F.X. Che, C.K. Wang, Anthony Y.S. Sun and H.B. Tan, EuroSime2007, London, UK, pp 344-349.
15-18 April, 2007

Development and Assessment of Global-Local Modeling Technique Used in Advanced Microelectronic Packaging
F. X. Che, W. H. Zhu, Wei Sun, Anthony Sun and C.K. Wang, EuroSime2007, London, UK, pp. 375 -381.
15-18 April, 2007

Cure shrinkage characterization and its implementation into correlation of warpage between simulation and measurement
W.H. Zhu, Sun Wei, Che F.X., Anthony Sun, C.K. Wang, H.B. Tan, EuroSime2007, London, UK, pp. 579-586.
15-18 April, 2007

Experimental and Numerical Assessment of Board-level Temperature Cycling Performance for PBGA, FBGA and CSP
Wei Sun, W. H. Zhu, F. X. Che, C. K. Wang, Anthony Y.S. Sun and H. B. Tan. 2006 Electronics Packaging Technology Conference , Singapore, pp.121-126.
7-8 Dec. 2006

Characterization of Viscoelastic Behaviour of a Molding Compound with Application to Delamination Analysis in IC Packages
Gojun Hu, Andrew A. O. Tay, Yongwei Zhang , Wenhui Zhu and Spencer Chew, EPTC2006, Singapore, pp. 53-59.
7-8 Dec. 2006

High-Speed Differential Interconnection Design for Flip-Chip BGA Packages
W.L. Yuan, H.P. Kuah, C.K. Wang, Anthony Y.S. Sun, W.H. Zhu, H.B. Tan, and A.D. Muhamad, EPTC2006, Singapore, pp. 76-81.
7-8 Dec. 2006

Optimization of Flip Chip Interconnect Reliability Using a Variable Compliance Interconnect Design
Andrew A.O. Tay and Wei Sun, 2006 Electronics Packaging Technology Conference , Singapore, pp.133-137.
7-8 Dec. 2006

Cyclic Bend Fatigue Reliability Investigation for Sn-Ag-Cu Solder Joints
F.X. Che, W.H. Zhu and Anthony Y. S. Sun , EPTC2006, Singapore, pp.313-317.
7-8 Dec. 2006

On the Thermal Characterization of an Exposed Top Quad Flat No-Lead Package
Y.Y. Ma, Krishnamoorthi. S, C.K. Wang, Anthony Y.S. Sun, W.H. Zhu and H.B. Tan, EPTC2006, Singapore, pp. 810-814.
7-8 Dec. 2006

Exposed Die-Top Encapsulation Molding for an Improved High-Performance Flip Chip BGA Package
Desmond Y. R. Chong, B. K. Lim, Kenneth J. Rebibis, S. J. Pan, Member, IEEE, K. Sivalingam, R. Kapoor, Anthony Y. S. Sun, and H. B. Tan, IEEE Transactions On Advanced Packaging, Vol. 29.
4, November 2006

Modeling Constitutive Model Effect on Reliability of Lead-Free Solder Joints
F. X. Che, W. H. Zhu, Wei Sun, and Anthony Y. S. Sun , ICEPT2006, Shanghai China, pp.155-160.
27-29, Aug. 2006

Experimental and Numerical Assessment of Board-level Temperature Cycling Performance for Eutectic and Pb-free windows-Chip-Scale-Package (wCSP)
Wei Sun, W. H. Zhu, F. X. Che, C. K. Wang, Anthony Y.S. Sun and H. B. Tan, ICEPT2006, Shanghai China.
26-29, Aug. 2006

Experimental and Numerical Assessment of Board-level Temperature Cycling Performance for Eutectic and Pb-free windows-Chip-Scale-Package (wCSP)
Wei Sun, W. H. Zhu, F. X. Che, C. K. Wang, Anthony Y.S. Sun and H. B. Tan, ICEPT2006, Shanghai China.
26-29, Aug. 2006

Performance Assessment on Board-level Drop Reliability for Chip Scale Packages (Fine-pitch BGA)
Desmond Y.R. Chong, F.X. Che, L.H. Xu, H.J. Toh, John H.L. Pang, B.S. Xiong, B.K. Lim, ECTC2006, San Diego, California, pp. 356-363.
May 30-June 2, 2006

Design and Process Optimization for Dual Row QFN
Danny V. Retuta, B.K Lim, H.B. Tan, ECTC2006, San Diego, California, pp. 1827-1835.
May 30-June 2, 2006

Analysis of Electromagnetic Susceptibility on High Speed Circuits Located in a Shielded Enclosure
H. N. Phyu, Er-Ping Li and Weiliang Yuan, EMC 2006, Singapore, pp. 312-315.
Feb 27- March 3, 2006

Drop impact reliability testing for lead-free and lead-based soldered IC packages
Desmond Y.R. Chong, F.X. Che b, John H.L. Pang, Kellin Ng,Jane Y.N. Tan, Patrick T.H. Low, Microelectronics Reliability 46 (2006) 1160–1171.

Die Attach Film Application in Multi Die Stack Package
S.N. Song, H.H Tan, P.L. Ong, Proc 7th Electronics Packaging Technology Conf, Singapore.
7-9th Dec 2005

Development of Ball Grid Array Packages with Improved Thermal Performance
Y.Y. Ma, Desmond Y.R. Chong, C.K. Wang, and Anthony Y.S. Sun, Proc 7th Electronics Packaging Technology Conf, Singapore.
7-9th Dec 2005

Drop Reliability Performance Assessment for PCB Assemblies of Chip Scale Packages (CSP)
Desmond Y.R. Chong, H.J. Toh, B.K. Lim, Patrick T.H. Low, Proc 7th Electronics Packaging Technology Conf, Singapore.
7-9th Dec 2005

Design and Development of Stacked Die Technology Solutions for Memory Packages
Desmond Y.R. Chong, H. Liu, B.K. Lim, P. Win, C.K. Wang, H.B. Tan, A.Y.S. Sun, Proc 7th Electronics Packaging Technology Conf, Singapore.
7-9th Dec 2005

Stacked Die Technology for DRAM Memory Packages
H. Liu, B.K. Lim, D.Y.R. Chong, P. Win, H.B. Tan, 15th European Microelectronics and Packaging Conference & Exhibition, Brugge, Belgium.
12th to 15th June, 2005

Drop Impact Reliability Testing for Lead-Free and Leaded Soldered IC Packages
D.Y.R. Chong, K. Ng, J.Y.N. Tan, P.T.H. Low, J.H.L. Pang, F.X. Che, B.S. Xiong, L.H. Xu, 55th Electronic Components & Technology Conference, Florida, USA.
31st May to 3rd June, 2005

Design and Development of True-CSP
K.R. Kanth, F.K.S. Poh, B.K. Lim, D.Y.R. Chong, A.Y.S. Sun, H.B. Tan, 55th Electronic Components & Technology Conference, Florida, USA.
31st May to 3rd June, 2005

Thermal Management and Characterization of Flip Chip BGA Packages
Krishnamoorthi S., D.Y.R. Chong, A.Y.S. Sun, Proc 6th Electronics Packaging Technology Conf, Singapore.
8-10th Dec 2004

Package Design Optimization and Materials Selection for Stack Die BGA Package
Rahul Kapoor, Lim Beng Kuan, Liu Hao, SEMICON West, 2004.

Mechanical Characterization in Failure Strength of Silicon Dice
D.Y.R. Chong, W.E. Lee, J.H.L. Pang, T.H. Low, B.K. Lim, Proc Inter Society Conference on Thermal Phenomena, ITherm, Nevada, USA, pp. 203-210.
June 2004

Development of a New Improved High Performance Flip Chip BGA Package
D.Y.R. Chong, B.K. Lim, Kenneth J. Rebibis, S.J. Pan, Krishnamoorthi S., R. Kapoor, Anthony Y.S. Sun, H.B. Tan, Proc 54th Electronic Components and Technology Conf, Nevada, USA, pp. 1174-1180.
June 2004

Heat Spreader Impact on Electrical Performance of a 4-Layer PBGA Package
S.J. Pan, D.Y.R. Chong, A.Y.S. Sun, Proc 54th Electronic Components and Technology Conf, Nevada, USA, pp. 1772-1775.
June 2004

Reliability Analyses for New Improved High Performance Flip Chip BGA Packages
D.Y.R. Chong, K.Y. Goh, R. Kapoor, A.Y.S. Sun, Proc 5th Electronics Packaging Technology Conf, Singapore, pp 695-700.
Dec 2003

Finite Element Parametric Analysis on Fine-Pitch BGA (FBGA) Packages
D.Y.R. Chong, C.K. Wang, K.C. Fong, InterPack'03, Hawaii, USA.
6th to 11th July, 2003

Reliability Assessment of a High Performance Flip-Chip BGA Package (organic substrate based) using Finite Element Analysis
D.Y.R. Chong, R. Kapoor, Y.S. Sun, Proc 53rd Electronic Components and Technology Conf, New Orleans, LA, pp. 207-213.
May 2003